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  4. 4M·CORE-based RISC microcontrol
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  6. 6Infineon Technologies
Brands Introduction

Infineon Technologies

  Time:2012-05-07 15:29

Infineon Technology AG was the semiconductor operations of the parent company Siemens AG .On April 1, 1999, it spun off from Siemens to form a separate legal entity, Infineon Technologies AG. In 2010, Infineon has 25149 employees worldwide. The company achieved sales of 3.295 billion in the 2010 financial year.
On May 1, 2006, Infineon's Memory Products division was carved out as a distinct company called Qimonda AG, which, at its height, employed about 13,500 people worldwide. Qimonda was listed on the New York Stock Exchange until 2009.
Infineon offers a wide range of microcontroller applications for the automotive, industrial and multimarket industry.

X800 family Based on the 8051 architecture the XC800 is divided into the A-(Automotive) and I-(Industrial) Family, providing low cost micros, for example applied in applications like body, safety, motor control, intelligent lighting and electro mobility .
XE166 Family, a Real Time Signal Controller applied in industrial applications.
XC 2000 family ,designed for Automotive applications.
C166 family
C167 family
XMC4000 is a ARM Cortex M4F based microcontroller family for industrial applications.
TriCore Family is based on a unified RISC/MCU/DSP processor core. Infeneon launched the first generation of AUDO(Automotive unified processor) in 1999.The TC1782 is the first member of the AUDO MAX family designed for automotive applications.

MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies ,formerly MIPS Computer System, Inc.. The early MIPS architectures were 32-bit, and later versions were 64-bit.Multiple revisions of MIPS instruction set exist, including MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64.The current revisions are MIPS32 (for 32-bit implementations) and MIPS64 (for 64-bit implementations).MIPS32 and MIPS64 define a control register set as well as the instruction set. Several optional extensions are also available, including MIPS-3D which is a simple set of floating-point SIMD instructions dedicated to common 3D tasks,MDMX (MaDMaX) which is a more extensive integer SIMD instruction set using the 64-bit floating-point registers, MIPS16e which adds compression to the instruction stream to make programs take up less room,and MIPS MT, which adds multithreading capability.
Computer architecture courses in universities and technical schools often study the MIPS architecture.The architecture greatly influenced later RISC architectures such as Alpha.
MIPS implementations are primarily used in embedded systems such as Windows CE devices, routers, residential gateways, and video game consoles such as the Sony PlayStation 2 and PlayStation Portable. Until late 2006, they were also used in many of SGI's computer products. MIPS implementations were also used by Digital Equipment Corporation, NEC, Pyramid Technology, Siemens Nixdorf, Tandem Computers and other during the late 1980s and 1990s. In the mid to late 1990s, it was estimated that one in three RISC microprocessors produced were MIPS implementations.
In 1981, a team led by John L Hennessy at Stanford University started work on what would become the first MIPS processor. The basic concept was to increase performance through the use of deep instruction pipelines. Pipelining as a basic technique was well known before (see IBM 801 for instance), but not developed into its potential. The MIPS design uses 6 bits of the 32-bit word for the basic opcode, the rest may contain a single 26-bit jump address or it may have up to four 5-bit fields specifying up to three registers plus a shift value combined with another 6-bits of opcode; another format, among several, specifies two registers combined with a 16-bit immediate value, etc. This allowed this CPU to load up the instruction and the data it needed in a single cycle, whereas an older non-RISC design , such as the MOS Technology 6502 for instance,required separate cycles to load the opcode and the data. This was one of the major performance improvements that RISC offered . However , mordern non-RISC designs achive this speed by other means.
In1984, Hennessy was convinced of future commercial potential of the design, and left Stanford to form MIPS Computer Systems. They released their first design , the R2000, in 1985, improving the design as the R3000 in 1988. These 32-bits CPUs formed the basis of their company through the 1980s, used primarily in SGI'S series of workstation and later digital equipment Corporation DECStation workstations and servers. The SGI commercial designs deviated from the Stanford academic research by implementing most of the interlocks in hardware, supplying full multiply and divide instructions (among others). The designs were guided, in part, by software crchitect Earl Killian who designed the MIPS III 64-bit instruction-set extension, and led the work on the R4000 microarchitecture.
In 1991 MIPS released the first 64-bit microprocessor, the R4000. The R4000has an advanced TLB where the entry contains not just virtual address but also the virtual address sapce id. Such buffer eliminates the major performance problems from microkernels that are slow on competing architecture because of the need to flush the TLB on the frequent context switches. However , MIPS had financial difficulties while bringing it to market. The design was so important to SGI, at the time one of MIPS's few major customers, that SGI  bought the company outright in 1992 in order to guarantee the design would not be lost . As a subsidiary of SGI, the company became known as MIPS Technologies.
MIPS Microprocessors
R2000, R3000, R4000, R4400, R4600, R4650,R4700, R5000, R8000, R10000,R12000,RM7000,MIPS645K,MIPS6420K,R14000, R16000, MIPS3224K, MIPS3234K, MIPS3274K,MIPS321004K, MIPS321074K

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